3 ECTS credits
80 h study time
Offer 1 with catalog number 4012826ENR for all students in the 1st and 2nd semester at a (E) Master - advanced level.
Embedded systems are subject to stringent constraints in terms of real-time behavior, computational performance, power dissipation, and cost. Silicon integrated circuits offer the best performance for the lowest power dissipation. However, the cost of designing and manufacturing an IC in advanced silicon technology is staggering. To amortize this huge Non Recurring Engineering cost, flexibility is introduced in these ICs through the use of programmable and/or configurable blocks. To realize the computational performance, multiple of these flexible blocks are integrated on a single chip and the embedded system’s applications are distributed over the multiple processors and configurable blocks.
Contents:
• The role of multi-processor and reconfigurable architectures in the embedded system domain.
• Enabling components for multi-processor and reconfigurable architectures
• Hardware architectures and their software infrastructure
• Programming models and the relation to the content items listed above
• Partitioning and mapping of applications onto such architectures taking into account constraints of the embedded systems domain: power restrictions, memory size restrictions, performance requirements
This course will be taught in English or in Dutch if the whole audience consists of native Dutch speakers.
• Slides of lecture and lecture notes
• A selection of research papers
The goal of this course is to acquire the skills to use state-of-the-art multi-processor and reconfigurable architectures in the domain of embedded systems and to choose an optimal architectural solution by means of scientific evaluation methods.
At the end of this course the students will have developed a deep knowledge and understanding in the architectural spectrum of embedded multiprocessor solutions and reconfigurable computing techniques. As such the students will understand the enabling components for multi-processor and reconfigurable architectures. They will also acquire a good understanding of the different programming models and software infrastructure used to develop such systems. By means of recent and seminal scientific papers in the field of multiprocessor and reconfigurable computing the students will be brought in contact with partitioning and mapping of applications onto such architectures taking into account constraints of the embedded systems domain like power restrictions, memory size restrictions and performance requirements.
The final grade is composed based on the following categories:
Other Exam determines 100% of the final mark.
Within the Other Exam category, the following assignments need to be completed:
Not applicable
This offer is part of the following study plans:
Master of Electronics and Information Technology Engineering: Standaard traject (only offered in Dutch)
Master of Photonics Engineering: Standaard traject (only offered in Dutch)
Master in Applied Sciences and Engineering: Applied Computer Science: Standaard traject
Master of Applied Sciences and Engineering: Computer Science: Artificial Intelligence
Master of Applied Sciences and Engineering: Computer Science: Multimedia
Master of Applied Sciences and Engineering: Computer Science: Software Languages and Software Engineering
Master of Applied Sciences and Engineering: Computer Science: Data Management and Analytics
Master of Electronics and ICT Engineering Technology: informatie- en communicatietechnieken met profiel ingebedde systemen (only offered in Dutch)
Master of Electrical Engineering: Standaard traject BRUFACE J